Inverter devices that are typical power semiconductor devices include a terminal having a reference potential of the device (also referred to as reference potential HGND), and a high-potential-side switching element and a low-potential-side switching element that are connected in series with each other between the terminal and a terminal to which a positive high voltage (also referred to as voltage HVCC) is applied. The midpoint potential between the high-potential-side switching element and the low-potential-side switching element is used as an output voltage (also referred to as voltage HVO) of the inverter device. As a result of the wiring structure, the reference potential with which the low-potential-side switching element is operated is the reference potential HGND, whereas the reference potential of the high-potential-side switching element is a reference potential VS that varies according to the voltage HVO with respect to the reference potential HGND. Thus, it is necessary to adjust, to the reference potential VS, a reference potential of a driving signal (typically, gate signal) to be input to the high-potential-side switching element.
Integrated circuits (generally called High-Voltage ICs (HVICs)) for driving the high-potential-side switching element include a level shift circuit for converting a reference potential of a signal to obtain a driving signal with the reference potential VS. The level shift circuit includes a primary circuit that receives an input signal indicating a switching timing of a high-potential-side switching element, a circuit (hereinafter referred to as level shift main circuit) that converts the reference potential of a signal which is output from the primary circuit, and a secondary circuit that outputs a driving signal for actually driving the high-potential-side switching element using the signal whose reference potential has been converted by the level shift main circuit. The secondary circuit is powered by a power supply voltage VB with the reference potential VS. Meanwhile, the primary circuit is powered by a power supply voltage VCC with a reference potential GND.
In the operations of the inverter devices handling the positive voltage HVCC, when the high-potential-side semiconductor switching element is turned OFF, a negative surge occurs at the reference potential VS of the secondary circuit due to an abrupt change in a current and an inductance of the wiring. The reduction in the reference potential VS of the secondary circuit subject to the negative surge also reduces the potential of the secondary circuit powered by the power supply voltage VB. When the potential of the secondary circuit powered by the power supply voltage VB is lower than the reference potential GND of the primary circuit, the level shift main circuit cannot transmit a signal from the primary circuit to the secondary circuit. Even without reduction in the potential to such an extent, if a difference between the potentials is insufficient, a logical circuit in the level shift main circuit does not normally operate, and the level shift main circuit may still be unable to transmit a signal.
While the signal cannot be transmitted, even when an input signal to the HVIC is switched, the output signal is not switched, thus causing a latch in the level shift circuit to malfunction. Sometimes the malfunctioning of the latch continues and interferes with a normal operation of the inverter devices, until the potential of the secondary circuit powered by the power supply voltage VB becomes sufficiently higher than the reference potential GND of the primary circuit and the input signal is again switched.
According to Japanese Unexamined Patent Application Publication No. 2010-263116 (Patent Document 1), a clamp diode is inserted between the reference potential VS and the reference potential GND to take measures against the negative surge. The anode of the clamp diode is connected to the reference potential GND, and the cathode thereof is connected to the reference potential VS. When the reference potential VS is lower than the reference potential GND, the clamp diode causes a current to flow from the reference potential GND to the reference potential VS to clamp the reference potential VS at a voltage lower by a forward voltage of the clamp diode with respect to the reference potential GND. Furthermore, according to International Publication WO01/59918 (Patent Document 2), a clamp diode and a protection circuit are arranged outside of an HVIC.